Principal Engineer - Verification, CI/CD Infrastructure & Embedded Hardware (AISW) - Remote Possible
Santa Clara, CAPosted Jul 16, 2026
Skip to main contentOur CompanyOur BusinessSearch for JobsJoin Talent NetworkFAQsProfileEnglishSign InSingle PositionView All JobsRemotePrincipal Engineer - Verification, CI/CD Infrastructure & Embedded Hardware (AISW) - Remote PossibleSanta Clara, California, United States of AmericaApply NowAdd to Job CartFind out how well you match with this jobUpload your resumeJob descriptionCompany and benefitsJob ID3086345Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > Machine Learning EngineeringGeneral Summary:The Principal Engineer, Verification (CI/CD & Embedded HW) is a senior individual contributor responsible for designing, scaling, and hardening CI/CD infrastructure and verification systems that validate Qualcomm’s AI Software stack—including QNN HTP, QAIRT, toolchains, kernels, and embedded runtime components.REMOTE based is possible for this role.This role is deeply technical and hands‑on: you will build large‑scale automated pipelines, integrate embedded hardware (DSP, NPU) test execution, drive target‑based regression infrastructure, and ensure efficient, reliable, and high‑signal validation at scale.You can apply past experience managing large CI/CD pipelines to quickly target issues that arise to a software and/or hardware level. New PositionKey Responsibilities (IC‑Focused):CI/CD Infrastructure Architecture & ScalingArchitect and scale large‑distributed CI/CD systems with high throughput and low flakiness.Design automated workflows: build, package, deploy, flash, run, log‑collection, triage, dashboarding.Develop scheduling/orchestration layers for thousands of HW‑based regression tests.Implement monitoring, telemetry, and automated mitigation for CI stability.Embedded Hardware Validation & AutomationDevelop embedded target test frameworks across DSP/NPU.Automate flashing, provisioning, power/reset, and new chipset bring‑up.Design hardware‑in‑loop validation for stability, thermal, long‑run correctness, and performance.Test Strategy, Coverage Expansion & Signal ImprovementOwn coverage strategy for throughput, correctness, memory behavior, and runtime scheduling.Develop automated triage signals and failure classification systems.Eliminate flakiness and nondeterminism in HW test environments.Open‑Source & Internal Pipeline OwnershipMaintain CI/verification pipelines for internal and open‑source projects.Enforce PR gating, reproducible builds, artifact management, and API correctness.Cross‑Functional InfluenceInfluence DevOps, firmware, and platform teams using data‑driven insights.Lead technical deep‑dives on CI and embedded HW failures.Align infrastructure capabilities with program milestones and customer requirements.Documentation & Process EngineeringProduce high‑quality documentation for CI architecture, HW frameworks, and best practices.Drive continuous improvement and streamline reproducible HW testing workflows.Required Qualifications10+ years in CI/CD engineering, verification, embedded systems, or runtime/toolchain development.Expertise designing/scaling CI/CD (Buildkite, Jenkins, GitLab CI, GitHub Actions).Deep experience integrating embedded hardware into automated pipelines.Background in firmware flashing, device provisioning, power/reset automation, and board‑farm debugging.Strong scripting/programming in Python, Bash, C/C++.Experience maintaining open‑source verification pipelines.Strong debugging across runtime/driver/inference layers.Ability to influence cross‑functional engineering teams.Preferred QualificationsFamiliarity with Qualcomm AI stack (QNN, QAIRT, SNPE).Experience with heterogeneous compute validation (DSP/GPU/CPU/NPU).Background in silicon bring‑up or hardware‑in‑loop systems.Experience with large device‑farm operation and automation.Success IndicatorsHighly stable, scalable CI/CD pipelines with reduced failures/flakiness.Faster regression turnaround and increased throughput.Strong embedded target coverage with reproducible signals.Positive feedback from global...