Principal Silicon Engineer

Principal Silicon Engineer | Microsoft Careers Skip to main content Microsoft Careers Careers Careers Search Search jobs Sign in Single PositionView All JobsPrincipal Silicon EngineerUnited States, California, Mountain View +4 moreApply nowAdd to cartFind out how well you match with this jobUpload your resumeJob descriptionCompany and benefitsJob number200043328Date postedJul 21, 2026Work site3 days / week in-officeTravelLess than 25%ProfessionHardware EngineeringDisciplineSilicon EngineeringRole typeIndividual ContributorEmployment typeFull-TimeOverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Interface IP Team team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Silicon Engineer to join the team.#SCHIEResponsibilitiesDesign and verify PLL cores for custom SerDes interface IPArchitecture of the PLL coreReview timing reports of critical timing cells inside the PLL core (e.g. digital loop filters & analog-to-digital timing interfaces)Simulation, post-layout verification & co-ordination with layout designers and other engineers on the macroGlobal clock distribution owner responsible for low jitter clocking for high-speed clocking spines across the SerDes macroCo-ordinate with modeling designers to ensure PLL functionalityQualificationsRequired Qualifications:Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.Other Requirements:Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency...