Senior Principal Embedded Software Architect

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

Senior Principal Embedded System Architect (HW/SW Co-Design)

About the Role

The Software and Digital Platform Group is looking for a Senior Principal Embedded System Architect to serve as a premier technical lead within our HW/SW Co-Design and System Architecture team, with a bias towards the software side of system architecture This is not a role about drawing abstract boxes on slides. It’s about enabling effective downstream chip development through earlier virtual-platforms, data-backed architectural exploration, and hands-on data flow analysis at the system level. Your primary responsibility is ensuring a strong software voice is present during the critical design and architecure phases. You’ll ensure we are making the right architectural decisions and tradeoffs early in the SoC and IP design cycle well before silicon exists.

You will work hand-in-hand with a hardware architect counterpart from day one. You will ultimately be a proxy for customers and downstream software teams during architecture definition, ensuring that every major design decision -- from IP block selection to data flow topology -- accounts for the software developer experience, real-world performance, field debuggability, and customer usability. We believe that excessive software complexity to compensate for hardware design decisions is a design failure. This role exists to prevent exactly that.

Responsibilities

• HW/SW Co-Design & Tradeoff Analysis: Lead SoC co-architecture alongside digital/analog teams to balance hardware complexity, software efficiency, and customer usability at product definition.
• Pre-Silicon Architecture Exploration: Build SystemC-based virtual platforms and develop proof-of-concept code to profile, model, and validate design choices before RTL is written.
• System & IP Evaluation: Translate complex use cases into requirements, assessing data paths and co-defining hardware accelerators to optimize software execution.
• Core Firmware Strategy: Define and develop core architecture for bootloaders, initialization sequences, microcode, and kernel drivers.
• Debug & Usability Advocacy: Champion best-in-class hardware debuggability/observability from early silicon bring-up through field deployment.
• Customer & Team Leadership: Act as the premier technical proxy for customer software teams, while providing high-level mentorship across the hardware/software boundary.

Minimum Qualifications

• Experience: BS/MS in EE, CE, or CS with 20+ years of system software architecture or firmware development experience.
• Boundary Expertise: Proven track record of operating at the highest technical levels to influence hardware design early in the silicon lifecycle.
• Computer Architecture: Deep knowledge of memory hierarchies, AMBA bus protocols (AXI/AHB/APB), DMA, and RISC-V/ARM architectures.
• Pre-Silicon Tools: Hands-on experience with SystemC (TLM 2.0) for early architecture exploration.
• Software Mastery: Expert in C/C++ writing embedded software, bootloaders, and drivers within RTOS (Zephyr) and Embedded Linux environments.
• Bring-up & Debug: Experienced in silicon bring-up and JTAG debugging, with the ability to read RTL (Verilog/SystemVerilog) to evaluate hardware intent.
• Communication: Exceptional skills in presenting complex architectural tradeoffs to hardware engineers, executives, and customer teams.

Preferred Qualifications

• Experience with hardware emulation (e.g., Palladium), FPGA prototyping, and pre-silicon workflows.
• Experience defining debug/trace infrastructure (CoreSight, JTAG) and performance modeling.
• Knowledge of signal processing, mixed-signal architectures, power management, and DVFS.
• Ability to review board schematics and use standard lab equipment (oscilloscopes, logic analyzers).
• Familiarity with modern DevOps for virtual platforms (CI/CD, Docker) and network protocols.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Accessibility for Ontarians with Disabilities Act (AODA): Analog Devices Canada Ltd. has a process in place and provides accommodations for employees with disabilities. To request an accommodation, please contact Connections HR Services at 781-937-2500 or at ConnectionsHRServices@analog.com.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time