2026 PhD Residency - Physical ML & Hardware-in-the-Loop (Future of Compute)
Mountain View, CA$109k–$157kPosted Jul 3, 2026
Apply**2** **0** **2** **6** **P** **h** **D** **R** **e** **s** **i** **d** **e** **n** **c** **y** **-** **P** **h** **y** **s** **i** **c** **a** **l** **M** **L** **&** **H** **a** **r** **d** **w** **a** **r** **e** **-** **i** **n** **-** **t** **h** **e** **-** **L** **o** **o** **p** **(** **F** **u** **t** **u** **r** **e** **o** **f** **C** **o** **m** **p** **u** **t** **e** **)**
Internship
Mountain View, CA
**Project Goal:**
This is the flagship moonshot for 'The Future of Compute' at X (the Moonshot Factory). This project is aimed at moving away from simulating physics on digital chips and instead building physical machines whose dynamics ARE the computation itself, achieving a 1,000,000x improvement in useful compute per Joule.
This residency focuses on bridging the gap between physical dynamical systems and machine learning code. Instead of modeling physics in a vacuum, you will work directly with physical silicon test chips and laboratory instrumentation to make them trainable. You will build the software-to-hardware calibration pipelines that demonstrate we can train a real physical substrate to match digital baseline accuracy at a fraction of the energy cost.
**How you will make 10x impact:**
+ Collaborate on building robust, real-time "hardware-in-the-loop" (HIL) training pipelines that connect active silicon oscillator arrays and memristor test-boards directly to PyTorch/JAX ML frameworks.
+ Independently design and execute experimental protocols to train real physical hardware on machine learning benchmarks (e.g., MNIST, CIFAR) using physics-aware backpropagation and equilibrium propagation.
+ Perform automated, high-velocity physical measurements to characterize non-linear physical dynamics, mapping real hardware output against digital twin simulators to quantify "reality-gap" discrepancies.
+ Analyze the effect of physical device noise, ambient thermal fluctuations, and RRAM resistance drift on live training convergence, and implement software-level algorithmic mitigation strategies (e.g., noise-injection training).
+ Investigate the physical execution of sparse, post-transformer architectures (Mamba-class SSMs) directly on physical neuromorphic arrays by developing physical weight-mapping and routing schemes.
+ Develop clean, reusable software interfaces (using Python, C++, and PyVISA) to automate lab instrumentation, making real-world physical training runs as seamless and reproducible as digital software training.
This project aims to push the limits of science and modeling as we know them and to prove how ML can radically accelerate our understanding of the world
+ Location: X's headquarters in Mountain View, CA
+ Start Date(s): Year-round rolling basis
+ Duration: a flexible 4 mo. to 1 year program based on project team needs and your availability
Throughout your AI Residency you can expect:
+ To be embedded in an agile, confidential project team focused on "Monkey First" thinking—identifying and tackling critical physical risks through immediate, hands-on laboratory iteration.
+ Direct mentorship from experts in neuromorphic systems, mixed-signal test engineering, and physics-aware machine learning.
+ A collaborative environment that values technical rigor, physical measurements, and the willingness to iterate rapidly through "V0.crap" hardware setups.
**What you should have:**
+ Currently enrolled in a PhD program in Computer Science, Electrical Engineering, Applied Physics, or a related STEM field.
+ Strong hands-on experience in hardware-in-the-loop (HIL) systems, laboratory automation, or writing custom software interfaces (e.g., Python, C++) to control physical instruments (oscilloscopes, parameter analyzers, source-measure units).
+ Proficiency in writing non-standard neural network training loops and custom physical simulator components in PyTorch, JAX, or C++.
+ Solid understanding of physical non-idealities (noise, drift, device-to-device variability) and how to represent them mathematically in training frameworks.
+ Ability to work in a physical laboratory environment, debug electrical setups, and rapidly prototype hardware-software interfaces.
**It’d be great if you also had these:**
+ Familiarity with non-volatile memory architectures (RRAM/memristors) or active analog coupled-oscillator circuits.
+ Experience in high-velocity characterization of integrated circuits or neuromorphic accelerators.
**Additional public information**
:
https://www.wired.com/video/watch/astro-teller-captain-of-moonshots-at-x-speaks-at-wired25
https://www.bloomberg.com/news/videos/2019-10-10/alphabet-x-s-astro-teller-on-bloomberg-studio-1-0-video
The US base salary range for this position is $109,000 - $157,000 + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include benefits.
**An Equal Opportunity Workplace**
At X, we don't just accept difference - we celebrate it, we support it, and we thrive on it for the benefit of our employees, our products and our community. We are proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements.
If you have a disability or special need that requires accommodation, please contact us at
x-accommodation-request@x.team
.