Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states.
Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.
This role follows a hybrid work schedule and reports to the Director, Silicon.
You will:
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Lead Custom Silicon Productization: Drive advanced ASICs and domain-specific architectures (TPU, ISP, AI/ML compute) for the Waymo Driver from first-silicon bring-up through characterization and high-volume production ramp.
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Define System-Level Test (SLT) Content & Hardware Strategy: Develop targeted test workloads, stress conditions, and pass/fail criteria and the define and architect the production screening hardware to rigorously screen marginal silicon and system interactions.
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Lead RMA & Field Failure Investigations: Drive comprehensive root-cause analysis for field returns and RMAs by correlating failure signatures with system telemetry, manufacturing history, and lab data to continuously improve ASIC reliability and close screening and validation gaps.
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Execute Hands-On Debug & Production Readiness: Perform hands-on silicon debug using lab equipment, system logs, firmware/software traces, and schematics to develop product operating limits, guard bands, binning strategies, and screening criteria based on characterization results.
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Optimize Yield & Product Health: Develop large-scale data mining and statistical analysis to identify failure signatures and yield limiters, translating hardware insights into actionable design feedback and scalable screening improvements.
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Silicon Bring-Up and Product Characterization: Partner closely with architecture, validation, platform, operations, and supplier teams to correlate lab, manufacturing, and system telemetry data, and root-cause silicon and system-level issues.
You have:
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Master’s degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a related technical discipline.
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10+ years of experience in product engineering, silicon bring-up, silicon characterization, yield debug, system validation, failure analysis, or productization of SoC, ASIC, or other complex semiconductor products, including hands-on experience bringing up and characterizing complex silicon products from engineering samples through production release.
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Experience defining or deploying system-level test, platform-level validation, production screening, or workload-based stress testing; Experience with yield analysis, failure signature analysis, margin analysis, guardbanding, correlation analysis, RMA analysis, or production-quality improvement.
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Experience debugging silicon or system-level failures using characterization data, system logs, lab measurements, firmware/software traces, schematics, and manufacturing data; Ability to read and interpret schematics, silicon specifications, characterization reports, system logs, and production data.
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Proficiency with Python, SQL, JMP, R, MATLAB, or equivalent tools for data analysis, automation, visualization, and debug.
We prefer:
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Experience with AI/ML accelerators, TPUs, GPUs, NPUs, ISPs, high-performance SoCs, automotive silicon, or domain-specific architectures.
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Experience debugging interactions across silicon, board, firmware, driver, operating system, workload, and application layers including with OS kernel, drivers, BIOS, firmware, boot flows, telemetry, diagnostics, or low-level software debug.
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Strong knowledge of PCIe, Ethernet, MIPI, high-speed interfaces, power delivery, clocking, reset, thermal behavior, or system performance optimization.
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Experience working with foundries, OSATs, contract manufacturers, reliability labs, and external suppliers.
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Experience applying machine learning, LLMs, RAG, agent frameworks, or advanced analytics to automate silicon characterization, yield debug, system log analysis, or production health monitoring.
Self-motivated and results-oriented, with strong ownership of technical deliverables in a fast-paced development environment; Excellent written and verbal communication skills, with the ability to explain complex technical issues to cross-functional teams and leadership.
Travel requirements:
- Approximately 10% travel, Vendor sites in Taiwan, Bring-up Activities in California
The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.
Salary Range$5,200,000—$6,000,000 TWD