ASIC Engineer

Skip to main content ASIC Engineer Meta Austin, TX Apply Join or sign in to find your next job Join to apply for the ASIC Engineer role at Meta Email or phone Password Show Forgot password? Sign in Sign in with Email or New to LinkedIn? Join now By clicking Continue to join or sign in, you agree to LinkedIn’s User Agreement, Privacy Policy, and Cookie Policy. ASIC Engineer Meta Austin, TX 3 days ago Be among the first 25 applicants See who Meta has hired for this role Apply Join or sign in to find your next job Join to apply for the ASIC Engineer role at Meta Email or phone Password Show Forgot password? Sign in Sign in with Email or New to LinkedIn? Join now By clicking Continue to join or sign in, you agree to LinkedIn’s User Agreement, Privacy Policy, and Cookie Policy. Save Report this job Meta provided pay range This range is provided by Meta. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range $178,000.00/yr - $250,000.00/yr Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing in performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs designed for Meta's infrastructure. In this role, you will establish the performance modeling methodology and long-term silicon roadmap strategy, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.ASIC Engineer Responsibilities:Define and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environmentsDrive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisionsDevelop and validate pre-silicon performance models that accurately predict post-silicon behavior for data center workloadsEstablish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipelineCollaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specificationsPartner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristicsLead cross-functional technical reviews and communicate...