MBIST Diagnostics Engineer, up to Sr. Staff

Skip to main contentOur CompanyOur BusinessSearch for JobsJoin Talent NetworkFAQsProfileEnglishSign InSingle PositionView All JobsMBIST Diagnostics Engineer, up to Sr. StaffHsinchu City, TaiwanApply NowAdd to Job CartFind out how well you match with this jobUpload your resumeJob descriptionCompany and benefitsJob ID3083260Company:Qualcomm Semiconductor LimitedJob Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:We are seeking an experienced and innovative engineer to lead the development of MBIST diagnostics, memory repair, failure analysis, and advanced memory diagnostics flows for next-generation SoCs and advanced memory architectures.This role spans the full cycle of memory test, diagnosis, repair, silicon debug, yield learning, and post-silicon bring-up, with strong focus on SRAM MBIST diagnostics, memory repair methodologies, failure signature analysis, and 3DIC memory diagnostics workflows.The successful candidate will work closely with Design, Memory IP, MBIST, Silicon Validation, Product Engineering, Reliability, Yield, Packaging, and Post-Silicon teams to develop robust memory diagnostic methodologies that improve diagnosability, repair effectiveness, yield learning, product quality, and manufacturing efficiency.This individual will serve as a technical leader and subject matter expert in MBIST diagnostics, memory repair, and 3DIC memory diagnostics, helping shape future memory-test strategies across advanced technology nodes, stacked memory architectures, and emerging multi-die systems.【Key Responsibilities】Memory Diagnostics & RepairLead SRAM MBIST diagnosis, memory failure analysis, and memory repair activities across complex SoC designs.Analyze ATE datalogs, fail logs, MBIST fail signatures, repair data, and silicon debug results to isolate memory failures and determine root causes.Develop and enhance memory diagnostic, redundancy analysis, BIRA, BISR, ECC, self-repair, and post-repair validation methodologies.Define diagnostic algorithms, failure signature formats, repair flows, and data structures required for scalable memory debug.Support investigations during HTOL failures, customer-return debug, production excursions, and high-volume manufacturing diagnostics.MBIST Architecture & Diagnostic MethodologyArchitect and implement MBIST diagnostic solutions for embedded memories, 3DIC, 2.5D, stacked memory, HBM, DRAM, and chiplet-based memory architectures across complex SoC designs.Define MBIST controller requirements, diagnostic modes, fail capture mechanisms, error logging, and repair access flows.Evaluate and optimize MBIST diagnostic strategies based on memory architecture, fault models, repair capabilities, and silicon debug requirements.Influence memory design-for-diagnostics hooks, observability requirements, repair access paths, and debug infrastructure during product development.Establish reusable memory diagnostics methodologies adopted across multiple products, technology generations, and memory compilers.Develop end-to-end 3DIC memory diagnostics flows spanning wafer test, known-good-die validation, stack/package test, system-level validation, and post-silicon debug.Silicon Debug & Yield LearningCorrelate manufacturing test results with silicon behavior.Perform memory fault localization and root-cause analysis.Support silicon bring-up, characterization, yield ramp, and production debug activities.Develop strategies to accelerate yield learning and improve product quality.Automation, Data Analytics & Workflow DevelopmentDevelop automation frameworks and diagnostic tools using Python, Perl, TCL, or equivalent scripting languages.Build scalable workflows for fail-log parsing, MBIST signature analysis, repair analysis, failure classification, and diagnostic reporting.Create data pipelines and dashboards to support yield learning, memory failure trends, repair effectiveness, and silicon debug productivity.Apply data analytics, statistical analysis, and machine-learning-assisted...