Physical Design Engineer - Synopsys DCnext

Skip to content IBM < Back to search results Physical Design Engineer - Synopsys DCnext Bangalore, Karnataka, India Professional Email X LinkedIn Apply now Introduction At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You’ll work with diverse technologies and colleagues worldwide to deliver resilient, future-ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress. Your role and responsibilities Job SummaryWe are seeking an experienced ASIC Synthesis Engineer with strong expertise in Synopsys Design Compiler NXT (DCnext) to drive high-quality RTL-to-Gates implementation. The candidate will be responsible for synthesis, optimization, and timing closure of complex SoC/ASIC designs in advanced technology nodes.Key Responsibilities- Perform RTL synthesis using Synopsys Design Compiler NXT (DCnext)- Develop and maintain TCL-based synthesis scripts and flows- Drive timing closure and fix setup/hold violations- Optimize area, power, and performance across PVT corners- Collaborate with RTL designers for design improvements- Define and validate SDC constraints- Debug synthesis and QoR issues- Support low-power synthesis flows (UPF/CPF)- Collaborate with Physical Design, STA, and DFT teams- Perform ECO synthesis- Ensure lint, CDC awareness, and synthesis checks Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise  -5-8 years of Physical design Eng ExpStrong hands-on experience with DCnext- Expertise in timing analysis and SDC constraints- Proficient in TCL and Verilog/SystemVerilog- Deep understanding of ASIC design flow- Knowledge of MCMM flows and low-power techniques Preferred technical and professional experience Strong knowledge and hands-on experience in physical design methodologies, including:Logic synthesisPlacementClock Tree Synthesis (CTS)RoutingGood understanding of physical verification and reliability checks, including:LVS, DRCNoise analysisPower analysisElectromigration (EM) / IR verificationStrong teamwork and collaboration mindset with:Good problem-solving skillsEffective communication skillsDemonstrated leadership capabilitiesHands-on experience with industry tools:Fusion CompilerPrimeTimeFormalityExposure to advanced technology nodes:7nm / 5nm / 3nmWorking knowledge of:UPF (Unified Power Format)DFT (Design for Test)Experience in:Flow automation and scripting Years of Experience:5 - 10 ABOUT BUSINESS UNIT IBM Systems helps IT leaders think differently about their infrastructure. IBM servers and storage are no longer inanimate - they can understand, reason, and learn so our clients can innovate while avoiding IT issues. Our systems power the world’s most important industries and our clients are the architects of the future. Join us to help build our leading-edge technology portfolio  designed for cognitive business and optimized for cloud computing. YOUR LIFE @ IBM In a world where technology never stands still, we understand that, dedication to our clients success, innovation that matters, and trust and...