Machine Learning Digital Design Engineer

Meta
Sunnyvale, CA$178k–$250kPosted Jul 17, 2026
Skip to main content Machine Learning Digital Design Engineer Meta Sunnyvale, CA Apply Join or sign in to find your next job Join to apply for the Machine Learning Digital Design Engineer role at Meta Email or phone Password Show Forgot password? Sign in Sign in with Email or New to LinkedIn? Join now By clicking Continue to join or sign in, you agree to LinkedIn’s User Agreement, Privacy Policy, and Cookie Policy. Machine Learning Digital Design Engineer Meta Sunnyvale, CA 1 day ago Be among the first 25 applicants See who Meta has hired for this role Apply Join or sign in to find your next job Join to apply for the Machine Learning Digital Design Engineer role at Meta Email or phone Password Show Forgot password? Sign in Sign in with Email or New to LinkedIn? Join now By clicking Continue to join or sign in, you agree to LinkedIn’s User Agreement, Privacy Policy, and Cookie Policy. Save Report this job Meta provided pay range This range is provided by Meta. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range $178,000.00/yr - $250,000.00/yr Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions, including machine learning and network acceleration. You will collaborate with researchers and engineers to design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon solutions that enable the next generation of innovative devices and hardware.Machine Learning Digital Design Engineer Responsibilities:Contribute to ASIC digital µArchitecture and designAssist performance/power analysis of the design and help meet power and performance targetsWork with architects to map algorithms onto the hardware and specify requirements for IP and subsystems integrationCollaborate with adjacent teams such as Verification, Physical Design, and Design-for-TestDevelop micro-architecture, RTL coding, and design verification for complex IPsDrive IP/sub-system micro-architecture and RTL design in collaboration with DV and PD leadsMinimum Qualifications:Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience8+ years of experience as a Hardware Design Engineer for production silicon shipped in volumeExperience in digital design µArchitecture, RTL coding, and micro-architecture developmentExperience communicating technical design decisions and trade-offs to cross-functional partners such as verification, physical design, and architecture teamsPreferred Qualifications:Experience in ML accelerator subsystems and top...

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