ASIC Engineer, Emulation

**Summary:** Meta is hiring ASIC engineers within the infrastructure organization. We are seeking a highly experienced Emulation Domain Expert to lead and drive advanced emulation model builds and flow for next-generation silicon products. As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with experienced engineers across the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications. **Required Skills:** ASIC Engineer, Emulation Responsibilities: 1. Architects, develop, and optimize emulation model builds across Palladium, Protium, and Zebu platforms, supporting complex SoC and IP prototyping for data center and AI applications 2. Lead methodology and flow development for hybrid emulation, accelerated verification, and co-simulation, integrating new tools and technologies into existing flows 3. Drive continuous improvement in emulation flows, CI/CD automation, and infrastructure for scalable and reliable model release and qualification 4. Collaborate with cross-functional teams (Design, DV, Validation, SW, Vendors) to deliver robust emulation environments and resolve technical challenges 5. Own intake, validation, and deployment of third-party vendor capabilities, including feasibility evaluation, integration, and rollout 6. Provide technical leadership and mentorship to team members, fostering growth and knowledge sharing 7. Enable and debug high-speed interfaces (PCIe, USB, Ethernet) and networking protocols in emulation environments 8. Support AI training and inference accelerator bring-up, validation, and performance optimization in emulation 9. Proactively resolve build issues, blockers, and ensure high standards of model quality and reliability **Minimum Qualifications:** Minimum Qualifications: 10. 6+ years of experience with hardware emulation, verification, prototyping, ASIC development cycles, pre/post silicon validation, emulation methodologies, hybrid flows, CI/CD automation, and infrastructure 11. Experience in Verilog, SystemVerilog, Python, C/C++ and/or similar languages 12. Experience working with internal and external partners for ASIC and/or system development 13. Demonstrated ability to lead complex technical initiatives and mentor other engineers 14. Experience solving complex technical problems and communicating decisions to technical and non-technical stakeholders across cross-functional teams **Preferred Qualifications:** Preferred Qualifications: 15. Knowledge of processor designs, GPUs, and the debug subsystem is highly desirable 16. Exposure to networking SoCs and AI SoCs, including bring-up, validation, and performance optimization in emulation environments 17. Exposure to PCIe, USB, Ethernet, and networking domain protocols 18. Proven expertise in emulation model builds and flows on Palladium, Protium, and Zebu platforms 19. Familiarity with industry best practices for model building, release, and qualification 20. Experience with AI training and inference accelerators, including bring-up and validation 21. Experience in driving improvements for emulation efficiency, automation, and capacity planning **Industry:** Internet