RF/Analog IC Design Engineer

## Company: Qualcomm Atheros, Inc. ## Job Area: Engineering Group, Engineering Group > RFIC Design General Summary: Define, design and develop complex radio frequency integrated circuits in complex SoC’s and discrete RFIC’s. Perform radio signal path and circuit topology analysis and detailed transistor-level design of highly-integrated transceivers and associated blocks for wireless applications, 4G, 5G, WLAN, BT and GPS standards using advanced process technologies. Utilize complex analysis, simulation, engineering, science and mathematical principles to compose algorithm structures to solve problems. Assess processing requirements and select devices to meet requirements. Debug and assess performance of algorithms in actual application hardware. Minimum Qualifications: • Bachelor's degree in Electrical Engineering with 3+ years of experience with designing RF/Analog circuits for wireless products (e.g., LNA's, PLL's) and 4+ years of ASIC design, verification, or related work experience. OR Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience. OR PhD in Electrical Engineering or related field and 2+ years of ASIC design, verification, or related work experience. • 2+ years of academic or professional experience using two or more of the following software: CADENCE, Virtuoso, ADS. Preferred Qualifications: • 3+ years experience in the transistor level design of RF analog integrated circuits with a Master's degree in Electrical Engineering. • Ph.D. in Electrical Engineering with internship or publication. • 5+ years of experience in one or more of the following areas: Design of receiver and transmitter RF/Analog circuits, Design of high-performance RF frequency synthesizers, Digital control and signal processing, Product experience from conception, design, and product commercialization, Electro Magnetic simulation/modeling. • 3+ years of experience working in a large matrixed organization. • 1+ year of product experience with post silicon characterization. • 1+ year in a technical leadership role with or without direct reports (only applies to positions with direct reports). • 1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director and above). Principal Duties and Responsibilities: • Leads others and independently determines circuit-level specifications based on system-level requirements. • Uses technical expertise with advanced tools/applications to develop module-level architecture and design of multiple complex blocks based on specifications. • Effectively utilizes advanced RFIC engineering practices to resolve complex architecture and design problems. • Runs complex simulations to determine how circuits perform under various circumstances. • Lead others to floor-plan layout; collaborates with layout engineers to generate the layout of circuits and conduct physical verification on the layout; perform review of generated layout. • Reviews block-level test plans and reviews test results and provides instructions for test engineers; helps more junior team members do the same. • Ensure that bugs are fully understood and analyzed; responsible for helping to resolve internal and end-customer issues. • Seeks advanced knowledge of industry trends, previous generation's advances, competitors' products, and advances related to RFICs. • Contributes to conversations to generate new ideas for next generation RFICs; provides recommendations for new directions to explore. • Reviews and writes clear and detailed technical documentation and feature descriptions for complex projects to guide users; reviews and provides feedback on more junior engineers' documentation. Level of Responsibility: • Working under some supervision. • Providing some supervision/guidance to others. • Taking responsibility for own work and making decisions with limited impact; impact of decisions is readily...