Silicon Verification Engineer

Silicon Verification Engineer | Microsoft Careers Skip to main content Microsoft Careers Careers Careers Search Search jobs Sign in Single PositionView All JobsSilicon Verification EngineerIndia, Karnataka, BangaloreApply nowAdd to cartFind out how well you match with this jobUpload your resumeJob descriptionCompany and benefitsJob number200044525Date postedJul 20, 2026Work site3 days / week in-officeTravel50-75%ProfessionHardware EngineeringDisciplineSilicon EngineeringRole typeIndividual ContributorEmployment typeFull-TimeOverview Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Senior Verification Engineers to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISiE) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment.  Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond  #SCHIEINDIA  ResponsibilitiesThe AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner. Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios. Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools Develop tests using UVM or C/C++ Analyse and debug test failures with designers to deliver functionally correct design. Identify and write functional coverage for stimulus and corner cases. Close coverage to plug verification holes and meet tape out requirements. Qualifications 4+ or more years of experience in design verification with a proven track record of delivering complex Accelerators or CPU’s or SoC IP’s In depth knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ based test environments. Solid understanding of computer architecture Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments Scripting language such as Python or Perl  Desirable: Hands on experience in Formal property verification knowledge in high-speed protocols like PCIe, Ethernet Processor based testbenches and emulation  Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US....